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Hamara Spaces - STIO - Recently_Completed_Projects

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PowerPC750_Modeling

Languages & Tools Internal


Project Title: Modeling POWERPC 750 processor

Tools Used: Languages: SMDL, SSDL

Tools: SANKHYA Line-Translator, Assembler, Linker, Teraptor Player, SANKHYA Model Space Explorer, Autoval

Implementation:

  • Processor modeling was done using SMDL
  • Line Translator used for testing Instruction encoding
  • Teraptor assembler and linker were used for compiling Programs
  • Teraptor Player was used for testing System integration using SSD
  • SANKHYA Model Space Explorer and Autoval were used for Test-case generation and test automation

Benefits of the model:
  • An application developer may use the model to implement the POWERPC 750 core in their system implementation without again designing the processor model
  • Developers can use the model without actually waiting for creation of the complete (hardware) prototype of the system
  • An application developer may use the model to implement the POWERPC 750 core in their system implementation without again designing the processor model
  • It provides flexibility for the user to implement different system models before a final implementation.
  • Automated test-case generation
  • Automated testing

STIO offers following processor modeling and simulator development services:

  • Fast Instruction Set Architecture Simulators
  • Simulation Performance Analysis and Optimization
  • Time Accurate Simulators
  • Debugger Interfacing
  • Instruction Trace, Profiling
  • Application Performance Analysis and Optimization

For more details, write to info@stio.in

www.stio.in

Published On : 12th August.

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