AnnounceFabTwin NeedForFabTwin 2016SIRP_Proposal.pdf idc-call-eoi.pdf sanskriti-coding-cpp.pdf scci-20042015-01.pdf scci-call-for-eoi-2020.pdf SCCI-Concept-NCRDP.pdf SCCI-SFRA-CertWorkshop.pdf scci-task-20200608.pdf skill-dp-template.pdf suukshma-yamtra-bhaarat.pdf upamaedha-wp-01.pdf upamaedha-wp-02.pdf u-pa-maee-dhaa-01.pdf YSAM-20201022-EoIR.pdf |
SCCI Announcement : Fab Twin Collaboration ProjectTo Develop 17 nm and beyond Semiconductor Fab Twins: March 30, 2026India has by and large missed the semiconductor fabrication and foundry industry opportunity over the past 3 decades. This has started to change with Government of India's aggressive support for semiconductor industry over the past 3 years. Honorable Prime Minister has set the goal of Vikasit Bharat by 2047 and bhaava svaatamtryam by 2035. Ability to create new and innovative paths to the design and setup of semiconductor fabrication facilities powered by innovative foundry models is an urgent imperative. A roadmap that leverages India's current strengths to establish a robust collaboration framework for accelerated research and development directed towards improving fab design capabilities naturally serves as an advanced technology anchor to profitable semiconductor investments in India leading to an increase in chip design and fabrication capabilities. SCCI is therefore announcing the creation of a collaboration project for developing a "17nm semiconductor fab twin" - that can be used as a virtual fab to develop 17nm PDK. SCCI invites MEITy, DoT, CDoT, CDAC and CSIR to join SCCI and collaborate on this project. SCCI also invites large banks, state governments and other institutions exposed to risks arising out of current semiconductor fab projects to join SCCI and support the initiatve as a risk mitigation measure. SCCI Contact Page |


